Field of Disclosure
The present invention relates to a thin film transistor and a method of manufacturing the same.
Description of the Related Art
A thin film transistor (TFT) has been used as various electronic devices such as flat panel displays and so on. For example, a thin film transistor ha been used as a switching element or a driving element in a flat panel display such as a liquid crystal display (LCD), an organic light emitting diode (OLED) display, an electrophoretic display, and so on.
A thin film transistor includes a gate electrode connected to a gate line for transmission of a scanning signal, a source electrode connected to a data line for transmission of a signal to be applied to a pixel electrode, a drain electrode facing the source electrode, and a semiconductor that is electrically connected to the source electrode and the drain electrode.
The semiconductor of the thin film transistor is formed of amorphous silicon, crystalline silicon, or the like. Amorphous silicon may be deposited at low temperature to form a thin film and is mainly used in a display device using a substrate that is mainly formed of glass with low melting point, and crystalline silicon has electrical properties of high electric field effect mobility, high frequency operating characteristic, and low leakage current.
However, an amorphous silicon thin film with a bottom gate structure, has difficulty in forming a large-area display device due to its low electric field effect mobility and so on.
To overcome this, a thin film transistor with a top gate structure, to which a low temperature polycrystalline silicon thin film with excellent carrier mobility is applied, is used. However, a transistor using a low temperature crystalline silicon thin film has complex manufacturing process, and as an organic light emitting display including a low temperature crystalline silicon thin film is further large-scaled, productivity is largely degraded.
Accordingly, research has been continuously conducted into a thin film transistor with a top gate structure for minimizing a channel of a low oxide semiconductor with low carrier mobility to embody a large-area display device.
The above information disclosed in this Background section is only for enhancement of understanding of the background of the invention and therefore it may contain information that does not form the prior art that is already known in this country to a person of ordinary skill in the art.